Before starting the segmentation let's first dive little bit into the history of microprocessor.

The width of the address bus determines how much memory it can address. The more bits, the more physical memory it can address. The width of the data bus determines how big of a data “word” it can read at one time, or per clock cycle, etc.

Microprocessor History

Here's brief overview of the key milestones in the history of microprocessors:

1 Intel 4004 (1971):

• Developed by Intel Corporation.
• The first commercially available microprocessor.
• 4-bit microprocessor.
• Designed for use in calculators and other embedded systems.
• Introduced the concept of a programmable processor on a single chip.

2 Intel 8008 (1972):

• The successor to the Intel 4004.
• 8-bit microprocessor.
• Increased computing power and capabilities.
• Widely used in early microcomputers and electronic systems.

3 Intel 8080 (1974):

• An enhanced version of the Intel 8008.
• 8-bit microprocessor.
• Introduced the concept of an 8-bit data bus and 16-bit address bus.
• Widely used in early microcomputers, including the Altair 8800.

4 Intel 8085 (1976):

• Improved version of the Intel 8080.
• 8-bit microprocessor.
• Enhanced instruction set and improved performance.
• Widely used in early microcomputers and embedded systems.

5 Intel 8086 (1978):

• The first 16-bit microprocessor in the x86 family.
• Introduced by Intel Corporation.
• 16-bit microprocessor with a 20-bit address bus.
• Enhanced performance and memory addressing capabilities.
• Used in early IBM PCs and compatible computers.

Intel 8085 Microprocessor

The Intel 8085 is an 8-bit microprocessor introduced by Intel in 1976. It was an enhancement of the earlier 8080 CPU and became very popular in early microcomputers and embedded systems. Here are some key features of the 8085:

Architecture:

• 8-bit Data Bus: The 8085 has an 8-bit data bus, meaning it can process 8 bits of data in a single operation.
  • The data bus is bidirectional.
  • The 8-bit data bus is used to transfer data between the microprocessor and memory or I/O devices.
  • Although the data bus is only 8 bits wide, it does not limit the addressable memory space; it only limits the size of data chunks that can be transferred at a time.
• 16-bit Address Bus: It has a 16-bit address bus, which allows it to address up to 64KB of memory.
  • It is unidirectional. It is 16-bit wide.
  • The 16-bit address bus is used to specify the address of the memory location where data is to be read from or written to.
  • This bus can carry 16-bit addresses, allowing access to 2^16 = 65,536 unique memory locations or bytes (64KB).
• Registers: The 8085 includes several registers, including an accumulator, six general-purpose registers (B, C, D, E, H, and L), a stack pointer, and a program counter (Holds the address of the next instruction to be executed).
  • Program Counter (PC):
    • The program counter in the 8085 is actually 16 bits long, not 8 bits. It holds the address of the next instruction to be executed.
    • The PC can therefore address memory locations from 0000H to FFFFH, covering the entire 64KB memory space.
  • Stack Pointer:
    • It is a 16-bit special register.

Memory:

• Capable of addressing up to 64 KB of memory using a 16-bit address bus.
• Memory is organized into 64 KB of addressable locations.

How Addressing Works

Fetching an Instruction:

When the 8085 fetches an instruction, the following steps occur:

1. Address Generation:
   1. The PC contains the address of the next instruction to be executed. For example, if the PC contains 2000H, this is the address of the instruction in memory.
2. Address Placement:
   1. The 8085 places the address (2000H) on the address bus. The address bus is 16 bits wide, so it can handle the 16-bit address.
3. Memory Read Operation:
   1. The microprocessor signals a memory read operation. The memory responds by placing the 8-bit instruction stored at address 2000H onto the data bus.
   2. The instruction is then read into the Instruction Register (IR) of the 8085.
4. Execution:
   1. The instruction is decoded and executed by the microprocessor

Visual Representation:-

1 Addressing Memory:

• Address Bus: [A15-A8][A7-A0] (16 bits)
• Data Bus: [D7-D0] (8 bits)

2 Example of Addressing:

• Let's say the PC = 2000H.
• The address bus will carry the address in two parts:
  • Higher byte (A15-A8) = 20H
  • Lower byte (A7-A0) = 00H

3 Memory Layout:

Address Bus       Data Bus
A15-A8 A7-A0      D7-D0
0010   0000 0000  <Instruction/Data>

4 Fetch Cycle:

• PC: 2000H
• Address Bus: 0010 0000 0000 (2000H)
• Memory Contents at 2000H: 3EH (Example instruction)

5 Step-by-Step Example:

Let's visualize a specific example where the PC contains the address 2000H, and the instruction at 2000H is MVI A, 32H.

• PC = 2000H:
  • The PC holds the address 2000H.
• Fetch Cycle:
  • The address 2000H is placed on the address bus.
  • The memory read control signal (RD) is activated.
  • The instruction MVI A, 32H (which is 2 bytes long) is fetched from memory.
  • First byte (opcode for MVI A) is read from 2000H: Data Bus = 3EH.
  • PC is incremented to 2001H.
  • Second byte (immediate data 32H) is read from 2001H: Data Bus = 32H.
  • PC is incremented to 2002H.
• Execution:
  • The 8085 decodes 3EH as MVI A.
  • The immediate data 32H is loaded into the accumulator (A).

References:

https://www.inf.pucrs.br/~calazans/undergrad/orgcomp_EC/mat_microproc/intel-8085_datasheet.pdf

Intel 8086 Microprocessor

The Intel 8086 is a 16-bit microprocessor introduced by Intel in 1978. It was the first 16-bit microprocessor in the x86 family of processors. Here are some key features of the 8086:

Architecture:

• 16-bit microprocessor.
• The address bus is 20-bits wide, capable of addressing up to 1 MB of memory.
• The data bus, on the other hand, is 16 bits wide because it can only transfer 16 bits of data at a time.

Registers:

• 16-bit registers: AX, BX, CX, DX, SI, DI, BP, SP, IP.
• 16-bit segment registers: CS, DS, SS, ES.
• 16-bit flags register.

Memory:

• Capable of addressing up to 1 MB of memory using a 20-bit address bus.
• Memory is organized into segments, with each segment containing 64 KB of addressable locations.

Why 20-bit address bus?

In the Intel 8086 microprocessor, memory is addressed using a 20-bit physical address. This allows for a maximum of 1 MB (2^20 bytes) of addressable memory locations. However, the 8086 processor uses a 16-bit data bus, which means it can access data in 16-bit chunks.

Now, everyone might be thinking if they need 20-bit physical address why did not they made it as 20 bit microprocessor so that it can address whole 2^20 physical address.

Yes you are absolutely right, they should do it however, this solution has a performance constraint. Since memory location in the 8086 microprocessor is byte-addressable, meaning each memory location can store one byte of data. However, due to the 16-bits data bus, the 8086 microprocessor fetches or stores 16 bits (2 bytes) of data in one operation.

With a 20-bit physical address, we are dealing with 2 and a half bytes (8 bits * 2 + 4 bits). This means that for every memory address, we have 2 full bytes and a half byte left over.

Microprocessor does two major activities externally.

• Read from memory.
• Write to memory.

Let us discuss a generic microprocessor that has 16 bit address bus and 8 bit data bus.

• In this case, the microprocessor can access up to 64 K locations because it has 16 address lines (2^16 = 64K).
• Since this microprocessor has 8 bit data bus, each location contains 8 bits (1 byte).
• The address range of the processor is given below:

Since binary representation is quite laborious, we use Hexa-Decimal Representation, which is a short form of Binary.

So the microprocessor, with 16 address lines, can address 0000 - FFFF locations. In the same way, the 64K memory has 16 address lines has locations 0000 - FFFF. Since both are identical and made for each other. Every address location addressed by Microprocessor has a corresponding location in Memory. Every address of Microprocessor is mapped to every location of Memory (0000 -> 0000, 0001 -> 0001, 0002 -> 0002, FFFE -> FFFE, FFFF -> FFFF). This is the simplest Memory Mapping. 1 Microprocessor, 1 Memory, and Microprocessor to memory are directly connected.

Segmentation:

Segmentation in the Intel 8086 microprocessor refers to the memory management technique used to access memory beyond the limitations imposed by its 16-bit architecture. The 8086 employs a segmented memory model, where the entire memory space is divided into segments, each with a maximum size of 64 KB (2^16 bytes).

The Intel 8086 employs a segmented memory model, which divides memory into segments. Each segment can hold up to 64KB (or 2^16 bytes) of data. However, the 8086 uses a combination of a 16-bit segment address and a 16-bit offset address to calculate a physical address, resulting in a 20-bit physical address space.

Let's delve deeper into how segmentation works in the 8086:

Segment Registers:

• The 8086 has four 16-bit segment registers: CS (Code Segment), DS (Data Segment), SS (Stack Segment), and ES (Extra Segment).
• Each segment register holds the starting address of a segment. These addresses are combined with an offset to form a physical memory address.
• CS points to the segment containing the current instruction being executed.
• DS typically points to the segment containing data accessed by default data movement instructions.
• SS points to the segment containing the stack.
• ES is an additional segment register that can be used by instructions requiring an extra data segment.

Segmentation Mechanism:

• To form a physical address, the 8086 combines a segment value from one of the segment registers with an offset value.
• The offset value is a 16-bit value that represents the distance from the beginning of the segment.
• The physical address is calculated using the formula: Physical Address = (Segment value << 4) + Offset value.
  OR
  Physical Address = (Segment value * 16) + Offset
• For example, if CS contains 0x1000 and IP contains 0x0100, the physical address of the instruction being executed would be 0x10100.

Memory Addressing:

• The 8086 can address up to 1 MB of memory (2^20 bytes) using segmentation.
• Each segment in the 8086 can address up to 64 KB (2^16 bytes) of memory. This limitation arises because the segment register is 16 bits wide.
• The segment size of 64 KB allows for efficient memory management and code/data organization.
• Segmentation allows programs to access memory locations beyond the 64 KB limit of a single segment by switching between different segments using segment registers.

With a 16-bit segment register and a 16-bit offset, the 8086 can theoretically access up to 2^20 (1 MB) unique memory locations.

However, due to segmented nature of memory, not all 1 MB of memory is directly accessible at all times.

By changing the values in the segment registers, the processor can effectively "move" through the entire 1 MB address space.

Segmentation Overrides:

• The 8086 provides instructions to override the default segment register used for memory access.
• For example, the DS register is typically used for data access, but the programmer can override this default behavior by specifying a different segment register in the instruction.
• This allows for flexibility in accessing data stored in different segments.

Segmentation and Real Mode:

• In real mode, which is the default operating mode of the 8086, segmentation is straightforward, and there are no memory protection mechanisms.
• This means that any part of memory can be accessed by any program, which requires careful programming to avoid conflicts.
• Later Intel processors introduced protected mode, which provided memory protection features.
• Segmentation is primarily used to extend the addressable memory space and organize code and data.
• However, segmentation can also lead to complications such as segment overlap and the need for careful management of segment registers.

Segment Overlapping:

• Segments can overlap in memory, meaning that a particular memory location can be accessed through multiple segment-offset combinations.
• Overlapping segments can be useful for efficient memory management and code/data organization, but they require careful management of segment registers to avoid conflicts.
• For example, a program can have its code segment starting at 0x0000 and its data segment starting at 0x1000, with both segments overlapping.